2 October 2025
Bahang Bay, Penang, Malaysia
Asia/Kuala_Lumpur timezone

Electrical Performance Evaluation Based on Design Parameters of Silicon Nanowire Gate-All-Around (GAA) TFET

Not scheduled
20m
Bahang Bay, Penang, Malaysia

Bahang Bay, Penang, Malaysia

Electronic Materials

Speaker

HANIM HUSSIN

Description

ABSTRACT
The SiNW GAA is one of the technologies with potential for better short channel behavior and gate control over conductivity. This work investigates the effect of various geometrical dimensions of Silicon Nanowire Gate-All-Around Tunneling Field Effect Transistor (SiNW GAA TFET) on electrical characteristics. The design parameters consist of gate oxide thickness (TOX), channel radius, dielectric material, gate metal work function and low/high drain voltage are varied in the simulation process to analyze the electrical performance of SiNW GAA TFET. Subthreshold Slope (SS), ION/IOFF current ratio and threshold voltage (Vth) are extracted. The result shows that the oxide thickness of 3 nm, the channel radius of 10 nm - 18 nm and SiO2 as a dielectric material tend to have the best SiNW GAA TFET characteristics. While the work function of gate metal TiN and drain voltage of 0.5V are the most effective for the device performance. This study highlights the potential of GAA nanowire TFETs to drive innovation in semiconductor technology through superior electrical performance.

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Presentation materials